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	This directory is associated with Rev 2 of the Application Note


    		Interfacing DDR3/DDR2/LPDDR memory devices with ADSP-SC5xx/ADSP-215xx processors  (EE-387)  


	that can be found at http://www.analog.com/ee-notes


	Analog Devices, Inc.
	DSP Division
	Three Technology Way
	P.O. Box 9106
	Norwood, MA 02062

	Date Created:    July 6th, 2016


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Description of the EE-Note:

	This application note discusses hardware and software guidelines for interfacing DDR3/DDR2/LPDDR devices with ADSP-SC58x/ADSP-2158x processors.


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Custom Init Codes: 

	These codes provide examples for customized init codes for ADSP-SC57x processors. 


Custom Preload Codes: 

	These codes provide examples for customized preload codes for ADSP-SC57x processors. 

DDR2_Init:

	These codes can be run on ADSP-SC573 DDR2 board (ADI Internal) to configure the Micron DDR2 device MT47H128M16RT-25E XIT:C.


DDR3_Init: 

	These codes can be run on ADSP-SC573 EZ-Kit to configure the Micron DDR3 device MT41K128M16-125.


LPDDR_Init: 

	These codes can be run on ADSP-SC573 LPDDR board (ADI internal)to configure the Micron LPDDR device MT46H128M16LFDD-48 WT .


DDR2_Init_Two_CGU: 

	These codes can be run on ADSP-SC573 DDR2 board (ADI Internal) to configure the Micron DDR2 device MT47H128M16RT-25E XIT:C with DCLK=400 MHz and CCLK=450 MHz using two CGUs.

DDR3_Re_Initialization_ARM: 

	This codes shows how to re-configure the DMC on ARM core when the ARM code is placed in DMC.
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All code examples have been written and tested with:

	ADSP-SC573 silicon revision 0.0

        CrossCore Embedded Studio Tools version 2.2.0 (with ADI internal ADSP-SC57x support)


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